The IR3521 features two converter outputs for the AMD processor VDD core and VDDNB auxiliary plane with an overall system setpoint accuracy of 0.5%. The IR3521 integrates an xPHASE3TM phase IC that provides overall system control and any number of phase IC interfaces. Monitoring the single-phase power supply to achieve a complete AMD SVID power solution. This article describes the main features of the IR3521, block diagram, and application circuit diagram and dual output AMD SVID converter circuit diagram.
The IR3521 Control IC is combined with an xPHASE3TM Phase IC provides a full featured and flexible way to implement a complete AMD SVID power solution. It provides outputs for both the VDD core and VDDNB auxiliary planes required by the CPU. The IR3521 provides overall system control and Interfaces with any number of Phase ICs each driving and monitoring a single phase. The xPHASE3TM architecture results in a power supply that is smaller, less expensive, and easier to design while providing higher efficiency than conventional approaches.
Main features of IR3521:
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2 converter outputs for the AMD processor VDD core and VDDNB auxiliary planes
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Supports High Speed ​​(HS) I2C Serial communications
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PSI_L serial commands are communicated to a programmable number of phase ICs
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0.5% overall system set point accuracy
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High speed error amplifiers with wide bandwidth of 20MHz and fast slew rate of 10V/us
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Remote sense amplifiers provide differential sensing and require less than 50uA bias current
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Programmable Dynamic VID Slew Rates
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Programmable VID Offset (VDD output only)
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Programmable output impedance (VDD output only)
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Programmable Dynamic OC for IDD_Spike
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Programmable per phase switching frequency of 250kHz to 1.5MHz
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Hiccup over current protection with delay during normal operation
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Central over voltage detection and communication to phase ICs through IIN (ISHARE) pin
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OVP disabled during dynamic VID down to prevent false triggering
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Over voltage signal to system with over voltage detection during powerup and normal operation
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Detection and protection of open remote sense lines
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Gate Drive and IC bias linear regulator control with programmable output voltage and UVLO
Small heating enhanced 32L MLPQ (5mm x 5mm) package
Figure 1. Block diagram of IR3521
The IR3521 Control IC is combined with an xPHASE3TM Phase IC provides a full featured and flexible way to implement a complete AMD SVID power solution. It provides outputs for both the VDD core and VDDNB auxiliary planes required by the CPU. The IR3521 provides overall system control and Interfaces with any number of Phase ICs each driving and monitoring a single phase. The xPHASE3TM architecture results in a power supply that is smaller, less expensive, and easier to design while providing higher efficiency than conventional approaches.
Main features of IR3521:
ï‚·
2 converter outputs for the AMD processor VDD core and VDDNB auxiliary planes
ï‚·
Supports High Speed ​​(HS) I2C Serial communications
ï‚·
PSI_L serial commands are communicated to a programmable number of phase ICs
ï‚·
0.5% overall system set point accuracy
ï‚·
High speed error amplifiers with wide bandwidth of 20MHz and fast slew rate of 10V/us
ï‚·
Remote sense amplifiers provide differential sensing and require less than 50uA bias current
ï‚·
Programmable Dynamic VID Slew Rates
ï‚·
Programmable VID Offset (VDD output only)
ï‚·
Programmable output impedance (VDD output only)
ï‚·
Programmable Dynamic OC for IDD_Spike
ï‚·
Programmable per phase switching frequency of 250kHz to 1.5MHz
ï‚·
Hiccup over current protection with delay during normal operation
ï‚·
Central over voltage detection and communication to phase ICs through IIN (ISHARE) pin
ï‚·
OVP disabled during dynamic VID down to prevent false triggering
ï‚·
Over voltage signal to system with over voltage detection during powerup and normal operation
ï‚·
Detection and protection of open remote sense lines
ï‚·
Gate Drive and IC bias linear regulator control with programmable output voltage and UVLO
Small heating enhanced 32L MLPQ (5mm x 5mm) package
Figure 1. Block diagram of IR3521
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