Using four dsp48e1 modules to implement a four-way adder, the dsp48e1 module is more complicated in the manual. I found two figures to roughly understand his basic functions.
Figure 1 dsp48e1 port description
Figure 2 Simplified DSP48E1 structure
Software Environment Matlab 2014 a
 Vivado 2014.4
 System generator 2014.4
Implementation steps1. Model building and simulation
The project is built under the simulink environment as follows
Figure 3 Schematic diagram of the four-way adder
After the model is built, double-click the system generator, and set the following according to the model of the a7 trial board
Figure 4 system generator
2, vivado simulation
Find the output directory and open the xpr file to get the complete vivado project
Figure 5 Engineering structure
Run simulation directly
Figure 6 Simulation
Simulation results
Set 4 inputs, respectively input: 1, 2, 3, 4 (fix_18_0), you can get 48bit output 1010b
Figure 7 Simulation results
analysisI haven’t used the SIMD function yet. I don’t know why. Once I tick the SIMD function to split 48bit into 4 12bits, an error will occur. It may be that my parameter settings are wrong. In this step, I have to continue to look at the official manual. I hope This problem can be solved next time.
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