0 Preface
Since ancient times, people have attached great importance to the safety of goods. Today, digital locks are gradually replacing the previous mechanical locks that are widely used in access control, banking and safes. However, these MCU-based cipher locks are less reliable and have limited functional expansion. With the development of the Internet of Things technology, people have put forward new requirements for the security and reliability of electronic locks. The FPGA described in this paper, that is, the field programmable gate array, is a product further developed on the basis of programmable devices such as PAL, GAL, and CPLD. Due to its high integration, electronic products are greatly reduced in size, and they are reliable, flexible, and efficient. They have been favored by designers.
1 System Overview
1.1 Overview of Features
(1) The initial password is 000000, press C to set the password. After the password is set, press A to lock.
(2) Use 4×4 keyboard as input device, press B key to start password input, serial input 6-digit password, press # key after input is completed, confirm password input is completed. The seven-segment digital tube will display the number entered by the user.
(3) If the password is entered correctly, the unlocking indicator will be off. If the password is entered incorrectly or the number of digits is insufficient, the alarm light will be on.
(4) When in the alarm state, press the * button to cancel the alarm.
(5) In order to ensure safety, the system can only reset the password by pressing the C key when the system is unlocked.
1.2 System Structure
The system uses a 4×4 matrix keyboard as the input device, and the seven-segment digital tube and indicator light are the system's input display and output indicators. The system can be divided into the following modules: keyboard scanning and debounce circuit, frequency dividing circuit, decoding circuit, encoder, register, comparator, controller, counter. The system structure is roughly as shown in Figure 1.
The switch used for the button is a mechanical elastic switch. When the mechanical contact is opened and closed, due to the elastic action of the mechanical contact, a push button switch does not stably turn on or off immediately when it is closed or disconnected, on the circuit. It will appear to enter the same value continuously. Therefore, a keyboard debounce program is added to the keyboard scanning circuit. In order to enable the user to see the password that he has entered, the display circuit of the seven-segment digital tube is also concentrated in the keyboard scanning circuit. The clock frequency used for keyboard scanning is 1 kHz, so the 1 MHz clock used by the system is divided into 1 kHz for keyboard scanning. Taking the frequency dividing module as an example, the procedure is as follows:
1.3 state machine
The state machine (FSM) is in a finite state based on the current state of the circuit. Once the timing and input signals are coming, the next state and potential are generated based on the current state and the change state of the input signal. . The state machine is the main controlling part of the lock shown in Figure 2, the state divided into 7, S1: password modification status; S2: an unlocked state; S3: locked state: S4: Status entering the correct password: S5: password input state ; S6: password input error state; S7: alarm state.
When the power system is in the unlock state, when the input change signal, the system enters the change password state; if the input lock signal into the safety lock state, the lock is closed; the security lock state, the input start signal, enter a password state; input password status, a count clock, the count value output by the ps_i_l password pulse as a register address, when the counter 6, the return count full signal CIN, if the cipher content and length are correct, the access code pre-inspection correct state, if the password is wrong, access code pre-inspection error state; password preliminary acceptance correct state, the input acknowledgment signal enter, into the unlocked state; password preliminary acceptance error status, when input confirmation signal enter, an alarm condition; alarm state, warn signal is equal to '1 "If the input alarm signal off_al is entered, the lock state will be entered. Taking the unlocking process as an example, the function simulation waveform is shown in Figure 3.
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